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java.lang.Objectharpoon.Analysis.Tree.DominatingMemoryAccess
public class DominatingMemoryAccess
DominatingMemoryAccess
is an analysis that uses
information about memory operations to determine which of them need
to do cache tag checks, and which don't. If one access dominates
another, and they are provably on the same cache line, we do not need
to check the later's tag.
We assume that the system allocator does not break objects over cache
lines.
We assign direct address register numbers to the most important
references. The defining access set the register to point to the
cache location of the data, and the using accesses, um, use the data
at that cache location. This is a standard register allocation
problem, but we
don't spill, since the contents of a direct address register is a
hardware decoded cache location which is kept consistent in the face
of replacements by the hardware. To restore an old value of the
register would potentially allow a process access into protected
data. Anyway, there is no CPU interface to get at the contents of
direct address registers for precisely the reason that it shouldn't
use them.
The backend needs to know which direct address register numbers we
used since it needs to invalidate them on a function return.
Nested Class Summary | |
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class |
DominatingMemoryAccess.daNum
|
Constructor Summary | |
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DominatingMemoryAccess(HCodeFactory parent,
Frame frame,
ClassHierarchy ch)
|
Method Summary | |
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HCodeFactory |
codeFactory()
Standard interface to run this analysis |
static boolean |
isDef(Object _danum)
Returns true if the MEM operation that returned this specifier (from harpoon.Backend.MIPS.Frame.daNum ) is the
defining access. |
static boolean |
isUse(Object _danum)
Returns true if the MEM operation that returned this specifier (from harpoon.Backend.MIPS.Frame.daNum ) is a use. |
static int |
num(Object _danum)
Returns the direct address register used by the MEM operation that returned this specifier (from harpoon.Backend.MIPS.Frame.daNum ). |
Methods inherited from class java.lang.Object |
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clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait |
Constructor Detail |
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public DominatingMemoryAccess(HCodeFactory parent, Frame frame, ClassHierarchy ch)
Method Detail |
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public static boolean isDef(Object _danum)
harpoon.Backend.MIPS.Frame.daNum
) is the
defining access.
A defining access does a tag check for the cache line it is on.
public static boolean isUse(Object _danum)
harpoon.Backend.MIPS.Frame.daNum
) is a use.
A use memory access can skip the tag check, since it has been
done for this line.
public static int num(Object _danum)
harpoon.Backend.MIPS.Frame.daNum
). A direct
address register is
an on-cache register that points to a specific cache location.
You can think of it as a cache line identifier. A dominant
accesses might do the tag check and set direct address register
3. A subordinate access can skip the tag check, and use direct
address register 3 instead. The direct address register number
substitutes for the virtual address to identify the cache line.
public HCodeFactory codeFactory()
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