Package harpoon.Backend.MIPS

Provides the classes for generating assembly code targetting the MIPS architecture.

See:
Description

Class Summary

BypassLatchSchedule	BypassLatchSchedule is a transformation on low level, register allocated assembly code that annotates opcode to indicate if a given use is the last use of a register.
CodeGen	MIPS.CodeGen is a code-generator for the MIPS II architecture.
Frame	Frame contains the machine-dependant information necessary to compile for the MIPS processor.
InstrBuilder	MIPS.InstrBuilder is an Generic.InstrBuilder for the MIPS architecture.
RegFileInfo	RegFileInfo encapsulates information about the MIPS register set.
StackInfo	This class encapsulates information about a given stack frame, e.g., does it grow up or down, where is the return address stored, that sort of thing.
TempBuilder	TempBuilder for MIPS.
TempVisitor	TempVisitor is an extension of TempVisitor for handling extensions of Temp local to the MIPS backend.

Package harpoon.Backend.MIPS Description

Provides the classes for generating assembly code targetting the MIPS architecture.

The main parts of the MIPS backend are the classses RegFileInfo, InstrBuilder, Frame, TempBuilder, Code and the spec-file CodeGen.spec.

Author:

Emmett Witchel (witchel@mit.edu)