C. Scott Ananian
High-level languages have much to offer the hardware designer. Freed of the tyranny of gates, it is possible to approach circuit function in terms of the algorithm or protocol it implements. Design rule checking and gate-level optimizations are becoming impossible for large designs without computer assistance anyway, the argument goes, so why not delegate all low-level design and synthesis to the machine, and free the humans to work on the high-level tasks the machine is incapable of?
In addition, a successful hardware compiler for a high-level language allows for more flexible hardware-software co-design and simulation. Ideally, a single high-level language could be used for both the application software and hardware. The model can be compiled completely in software for simulation or debugging, then easily partitioned to implement a subset of functions in hardware. If the compiler is retargettable, prototypes can be implemented using FPGA technology, and then the same source used to layout an ASIC when the design is finalized.
This work will explore the use of the general-purpose C programming language for hardware description, focusing on compiler issues. The implementation of a C-to-structural VHDL compiler is discussed, and we attempt to assess quantitatively the effect of C language features on hardware synthesis.